ASIC Test Development Engineer

Position: Ciena ASIC Test Development Engineer
Become an integral part of Ciena as an ASIC Test Development Engineer.

Your role focuses on designing production tests for mixed-signal ASICs, crucial for optimizing network performance.

This position at Ciena supports next-generation optical networking through the development of test solutions for mixed-signal ASICs in the Wavelogic product portfolio. Candidates should have substantial experience—5+ years with System Verilog and C/C++—and a strong understanding of ASIC testing techniques. Collaborate closely with analog and digital design teams to ensure product reliability and facilitate effective communication across functions.

Key Responsibilities:

• Design and implement production tests for efficiently executed ASICs

• Maintain necessary test environment infrastructure using C and System Verilog

• Develop rigorous test cases from design specifications

• Analyze and debug test failures for quality improvement

• Automate testing workflows for enhanced productivity

Requirements:

• Bachelor’s degree in Electrical or Computer Engineering

• 5+ years of relevant testing experience

• Proficient in System Verilog, UVM, SVA, and ATE platforms

• Strong automation scripting skills required

• Excellent communication in collaborative environments

Support Ciena's mission by applying your expertise to develop robust testing frameworks for next-gen mixed-signal ASICs.
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