FPGA Design Verification Engineer

Position: FPGA Design Verification Engineer Role
Step into the role of FPGA Verification Engineer at a progressive tech company, employing System Verilog and UVM principles to ensure thoroughly verified FPGA designs. This role will challenge your verification skills in a high-performance environment.

In this position, you will need extensive experience—over five years—in FPGA or ASIC verification. You’ll focus on integrating custom logic and third-party IP blocks, developing comprehensive verification environments, and executing thorough test plans. Collaboration with design teams is key to delivering high-quality, robust FPGA designs that meet stringent performance requirements.

Key Responsibilities:

• Perform design verification on FPGA systems with custom logic

• Develop verification environments utilizing System Verilog and UVM

• Design and carry out rigorous test cases and plans

• Solve debugging issues and determine the root causes

• Analyze code and functional coverage to drive closure

Requirements:

• 5+ years of experience in FPGA or ASIC verification

• Proficient in Verilog/System Verilog and hardware verification

• Experienced in UVM methodologies and simulation tools

• Understanding FPGA tool chains (e.g., Xilinx, Altera)

• Knowledge of high-speed protocols like PCIe and Ethernet

Bring your FPGA verification skills to a dynamic team focused on innovation and quality.
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