Senior ASIC Physical Design Engineer

Position: Senior ASIC Physical Design Engineer at Synopsys
Elevate your career as a Senior ASIC Physical Design Engineer ng your expertise in complex SoC designs to innovative projects and transformational technology.

Join a dedicated team at Synopsys, where you will contribute significantly to physical design implementation for test chips. With over nine years of experience in ASIC physical design, your skills will oversee RTL-to-GDS flow optimization and enhance productivity through tool automation. Collaborate closely with cross-functional teams to ensure robust delivery of silicon-proven IP solutions.

Key Responsibilities:

• Implement physical designs for test chips across various protocols

• Own and streamline RTL-to-GDSII flow for optimal performance

• Execute static timing analysis and physical verification checks

• Integrate updated cover cells and oversee hard-macro releases

• Collaborate with diverse teams during development phases

Requirements:

• 9+ years of ASIC physical design experience

• Strong grasp of ASIC physical design flow concepts

• Proficiency with advanced CAD tools like Design Compiler and Prime Time

• Proven track record in cross-functional project leadership

• Must be authorized to work in the USA

Leverage your ASIC design skills and thought leadership to impact next-generation silicon technologies at Synopsys.
#J-18808-Ljbffr