Senior Mixed Signal Design Engineer

Position: Senior Mixed Signal Design Engineer Role
Become a Senior Mixed Signal Design Engineer at Ciena, specializing in high-speed connectivity solutions. Contribute to innovative fiber optics technology in a flexible, inclusive setting.

We seek experienced engineers to excel in the design of precision Sigma-Delta circuits for high-speed DAC and ADC applications. The ideal candidate will create detailed System Verilog models and support various teams to optimize integrated circuit functionality. Your efforts will directly impact Ciena's advanced telecommunications solutions.

Key Responsibilities:

• Design high-precision DAC and ADC models

• Create and optimize System Verilog models

• Develop IBIS-AMS models for high-speed Ser Des IP

• Prepare comprehensive Design Specification documentation

• Support system-wide engineering collaboration efforts

Requirements:

• Degree in Electrical Engineering or related discipline

• Proven experience in CMOS/BiCMOS design

• Proficiency in Cadence, Synopsys tools

• Familiarity with System Verilog and Matlab/Simulink

• Effective communication skills in technical writing

Join Ciena to shape the future of high-speed optical transmission technology.
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