Layout Engineer Specializing in CMOS Design

Join Synopsys as a Layout Engineer focused on CMOS designs. You'll cultivate high-speed Ser Des interfaces while leveraging your extensive knowledge in analog and mixed-signal layouts.

At Synopsys, you will be essential in developing advanced silicon IP, utilizing your strong background in transistor-level design and layout techniques.

Your role involves collaborating with circuit designers to produce optimized layouts, implementing cutting-edge solutions to enhance performance and reliability across multiple foundry nodes.

Key Responsibilities:

• Implement and design analog and mixed-signal circuit layouts

• Translate schematics into robust and manufacturable formats

• Conduct comprehensive layout verification for quality assurance

• Employ techniques to tackle ESD and signal integrity challenges

• Document layout methodologies for team knowledge sharing

Requirements:

• Degree in Electrical or Computer Engineering or equivalent

• 5+ years of experience in layout design for integrated circuits

• Proficient with layout verification and EDA tools

• Strong understanding of signal integrity and layout effects

• Experience with Synopsys EDA tools is preferred

Drive innovation and be part of a dynamic team impacting the future of technology at Synopsys.
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