More jobs:
Senior RTL/FPGA Design Eng - Verilog, Vivado, CDC;
Job Description & How to Apply Below
A leading semiconductor company is seeking an RTL/FPGA Design Engineer with over 15 years of experience. The ideal candidate should have a bachelor's degree in engineering or computer science and possess excellent skills in RTL design using Verilog and System Verilog. Key responsibilities include working with EDA tools and knowledge of networking standards. This contract position offers a pay range of CA $110.00/hr to CA $135.00/hr.
#J-18808-Ljbffr
Position Requirements
10+ Years
work experience
Note that applications are not being accepted from your jurisdiction for this job currently via this jobsite. Candidate preferences are the decision of the Employer or Recruiting Agent, and are controlled by them alone.
To Search, View & Apply for jobs on this site that accept applications from your location or country, tap here to make a Search:
To Search, View & Apply for jobs on this site that accept applications from your location or country, tap here to make a Search:
Search for further Jobs Here:
×