Senior Engineer Digital Verification at Ciena

Position: Senior Engineer for Digital Verification at Ciena
Advance your career with Ciena as a Senior Digital Verification Engineer, where you will impact the Wavelogic product line. Engage in a rewarding environment focusing on innovation and collaboration.
As a Senior Engineer based in Ottawa, you will play a key role in validating critical digital circuits through innovative verification processes. This position involves close collaboration with various engineering teams to develop test strategies and perform comprehensive functional coverage. Your knowledge in System Verilog and experience with formal verification methodologies will be key to your success in this role.

Key Responsibilities:

• Understand and analyze functional requirements specifications

• Perform thorough validation of architectural blocks

• Develop and execute verification and coverage plans

• Create test scenarios using System Verilog UVM

• Provide updates on the status of verification efforts
Requirements:

• 5+ years of industry experience in digital verification

• Bachelor’s degree in Electrical or Computer Engineering

• Proficient in System Verilog, UVM, and SVA

• Familiar with major vendor simulators and tools

• Understanding of programming languages like Python and C/C++
Join Ciena to apply your expertise in digital verification and contribute to innovative telecommunications solutions.
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