DSP Designer

Fidus is a global high-tech design firm headquartered in Ottawa, with additional design centres in Kitchener-Waterloo and San Jose. We specialize in leading-edge electronic product development, with hardware, embedded software, FPGA/ASIC, and signal integrity teams working together to design and deliver next-generation products for clients in emerging technology markets.

The DSP Designer plays a key role in developing and delivering complex signal processing algorithms for Fidus clients, from concept through simulation, fixed‑point implementation, and hardware bring‑up. You will work directly with customers and internal Fidus FPGA/hardware teams to design algorithms, perform quantization and bit‑width analysis, and translate DSP concepts into feasible hardware architectures.

This role is ideal for someone who enjoys moving between application domains (communications, radar/sensing, industrial, medical), is comfortable working across the algorithm‑to‑hardware boundary, and takes pride in producing well‑documented, bit‑true designs.

At Fidus, you'll work on high‑speed, high‑complexity electronic systems, often using emerging technologies before they reach the broader market. You'll collaborate across FPGA/DSP, hardware, embedded software, verification, SI/PI, PCB layout, and mechanical/thermal design as part of cross‑functional teams delivering real products for our clients.

In practice, that means contributing to projects across communications, Aerospace & Defense, Space & Satellite, Industrial Automation, Automotive, Medical Devices, and Semiconductor engagements. You won't be limited to a single product or industry—your work will follow the technology, not just one roadmap.

• Develop and simulate DSP algorithms (equalization, filtering, estimation, detection) in MATLAB/Simulink and/or Python, from concept through fixed‑point validation
• Perform quantization/bit‑width analysis and produce bit‑true fixed‑point models suitable for HDL implementation
• Collaborate with FPGA/HDL and hardware teams to translate algorithms into feasible hardware architectures (pipelining, MAC/resource budgeting, timing closure)
• Support HDL verification through golden‑model test vectors and co‑simulation
• Support lab bring‑up, characterization, and tuning of DSP‑based hardware against real‑world channel/sensor behavior
• Adapt existing DSP toolkits to new client domains and standards across multiple engagements (e.g., communications, Aerospace & Defense, Space & Satellite, Industrial Automation, Automotive, Medical Devices, and Semiconductor)
• Document algorithm design decisions, trade‑offs, and validation results for client and internal reference

• BS/MS/PhD in Electrical Engineering, Applied Physics, or related field
• Strong foundation in signals and systems:
  Fourier/Z‑transform, digital filter design (FIR/IIR), sampling theory
• Practical experience with estimation/detection theory (e.g., matched filtering, MMSE, Kalman filtering) or adaptive filtering (LMS/RLS)
• Proficiency in MATLAB/Simulink and/or Python for algorithm design and simulation
• Experience with fixed‑point conversion and quantization trade‑off analysis
• Demonstrated ability to work across the algorithm‑to‑hardware boundary (collaborating directly with HDL/FPGA teams)
• Strong verbal and written communication skills - ability to explain algorithm trade‑offs to non‑DSP stakeholders

• Experience in one or more of: optical/wireless communications, radar/sensing, motor control, biomedical signal processing, semiconductor test
• Experience with high‑speed Ser Des and PAM4 signaling (e.g., PCIe Gen6, 400G/800G Ethernet electrical) - equalization (FFE/CTLE/DFE), link training, and FEC awareness
• Familiarity with AMD's Adaptive Computing portfolio (Versal, Alveo) or embedded x86 product lines
• Familiarity with HDL Coder, HLS, or Simulink‑to‑HDL co‑simulation workflows
• Hands‑on lab experience (scope, VNA, BERT, or domain‑equivalent test equipment)
• Exposure to safety‑critical or regulated development processes (DO-178C/DO-254, ISO 26262, IEC 62304/60601) - valued for A&D, automotive, and medtech engagements…