Digital Verification Engineer

Position: Digital Verification Engineer at Ciena
Become a vital part of Ciena's team as a Digital Verification Engineer focused on Forward Error Correction strategies. This role involves simulation, collaboration, and innovative approaches to create high-quality verification processes.

Ciena is seeking an enthusiastic Digital Verification Engineer to verify our Wave Logic ASICs technology. You will work closely with designers, verification engineers, and architects to ensure comprehensive validation of architectural blocks. Your expertise in programming and verification methodologies will lead to impactful contributions within our networking solutions team.

Key Responsibilities:

• Analyze architecture and functional requirements specifications

• Collaborate with FEC designers and system engineers

• Validate architectural functional blocks using diverse methods

• Develop verification test plans and formal coverage

• Create self-checking testbench environments with System Verilog

Requirements:

• Bachelor's degree in Electrical or Computer Engineering

• Strong skills in C/C++, System Verilog, and UVM

• Detail-oriented with a thorough work ethic

• Proven problem-solving abilities in engineering

• Commitment to continuous learning and technology sharing

Leverage your programming and verification skills to enhance Ciena's innovative networking technology!
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