Validation ​/ Verification Eng, Sr Supervisor

Job

18341

Country

Canada

City

Nepean

State/Province

Nepean

Date Posted

05-Aug-2026

Job Category

Job Subcategory

Employee

No

Job Description and Requirements

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in the lab watching what happens when theory meets reality. First silicon never behaves exactly as simulated, and you have built a career on figuring out why and what to do about it.

Managing people and projects simultaneously energizes you. You have led teams through bring-up/“Power On” chaos, kept schedules on track while debugging signal integrity issues, and hired engineers who became your best validators.

You think in test plans, not checklists. When a DDR eye diagram looks wrong, you systematically isolate the problem until you find it. At Synopsys, you will lead a lab team validating memory IP that ships in products worldwide.

What You'll Be Doing

• Lead first silicon bring-up and validation for DDR6, DDR5, LPDDR6/X, LPDDR5/5X, MRDIMM, and HBM test chips
• Perform electrical characterization including eye diagrams, jitter measurements, timing margins, and signal integrity analysis
• Drive debug and root cause analysis of silicon, firmware, and board issues using lab instrumentation and cross-functional collaboration
• Build automated validation frameworks using Python and C/C++ to improve test efficiency and data collection
• Lead multilayer PCB design for characterization platforms and customer evaluation kits
• Manage team hiring, staffing, resource allocation, morale and audit preparation while growing technical capability
• Work alongside cross-functional teams including but not limited to stakeholders, marketing, sales, customers, program/foundry as well as other lab managers and teams to weigh business impacts and make critical decisions
• Manage Gate Review and Kickoff Meetings, in addition to Characterization Plan and Report publications, checklists and supporting documentation

The Impact You Will Have

• Ensure Synopsys memory interface IP products meet performance and reliability standards before customer deployment
• Implement efficiency improvements and process changes to a team of 20+ staff across 3+ labs
• Reduce time to market by building reusable test infrastructure that accelerates validation across IP generations
• Provide silicon-proven characterization data that gives customers confidence to integrate Synopsys IP
• Identify and resolve issues early, preventing costly re-spins and customer escalations
• Grow a high-performing validation team in Nepean that becomes a center of excellence for memory IP
• Influence design decisions by feeding back real-world silicon behavior to architecture teams

What You'll Need

• Bachelor's degree in Electrical Engineering or equivalent technical field
• 8+ years of hands-on silicon validation experience with memory interfaces such as DDR, LPDDR, or HBM
• 3+ years managing engineering teams, including hiring and resource allocation
• Deep understanding of JEDEC specifications, jitter analysis, timing margins, and electrical characterization
• Proficiency in Python and C for test automation and hardware validation scripting
• Experience with ATE testers such as Teradyne, LTX/Credence, Advantest
• Board design experience including multilayer PCB development, experience with automotive qualification standards or reliability testing is a plus
• Experience in scheduling, event…