Validation Engineer DDR and HBM IP

Position: Validation Engineer for DDR and HBM IP
Elevate your career as a Validation Engineer focusing on DDR and HBM memory s role offers hands-on experience in silicon validation and testing automation.
As part of the Nepean lab team, your validation efforts will directly impact the readiness of Synopsys memory interface IP for shipment. Your tasks will include executing test cases, automating processes with Python, and collaborating across teams to analyze outcomes. The reliability assessments you conduct are crucial for maintaining customer trust and timely product delivery.

Key Responsibilities:

• Validate memory IP functionality and reliability on silicon

• Automate testing procedures using Python scripts

• Collaborate with design teams to resolve silicon issues

• Document and report findings for characterization

• Assess performance through statistical data analysis
Requirements:

• Bachelor’s or master’s in electrical/computer engineering

• 3-5 years of experience in silicon validation

• Proficient in languages like Python, C++, or MATLAB

• Experience with PCB design and troubleshooting

• Skilled with lab instruments for critical measurements
Your work will be pivotal in shaping the future of Synopsys products in the semiconductor industry.
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