Layout Design, Engineer

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI‑powered products. We deliver industry‑leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You understand that a well‑designed layout is not just about fitting shapes on a floorplan. It is about translating a schematic into something that will actually work in silicon, with all the parasitics, matching constraints, and routing realities that come with it. You have spent time learning how electronic devices behave at the physical level, and you know that a careless placement decision early on can create headaches for everyone downstream.

You are comfortable working from a schematic someone else designed and turning it into a mask layout that meets spec. You do not need to know everything on day one. You ask questions when something does not make sense, you take feedback without taking it personally, and you get better each time you close a block.

Automation does not intimidate you. Whether it is Python, PCL, or something else, you see scripting as a tool to make repetitive work faster and more accurate. You want to learn, you want to contribute, and you want to work with a team that will help you grow into a layout designer who can own blocks independently.

• Design analog mask layouts from schematics provided by circuit designers, working on blocks that range from small cells to larger subsystems
• Collaborate closely with schematic designers to ensure your layout meets design intent, performance targets, and manufacturability requirements
• Use layout tools to place devices, route connections, and verify DRC and LVS compliance before handing off your work
• Write and modify scripts in Python or PCL to automate repetitive layout tasks and improve turnaround time
• Participate in design reviews where you will walk through your layout decisions and incorporate feedback from senior designers
• Work under mentorship for the first few months as you ramp on the team's design flow, tools, and standards, with the goal of becoming an independent contributor

• Your layouts will directly enable circuit designers to move forward with verification and tapeout, keeping projects on schedule
• The quality of your work will reduce the number of layout respins and follow‑up fixes, saving time for the entire design team
• Your ability to automate portions of the layout process will free up senior designers to focus on more complex blocks
• You will help maintain the design standards and best practices that make the Ottawa team's output reliable and repeatable
• As you grow into independence, you will take ownership of full blocks, reducing bottlenecks and increasing team capacity
• Your attention to detail in DRC and LVS cleanup will prevent costly errors from reaching fabrication

• Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field with 1 to 2 years of layout design experience
• A solid understanding of electronic devices, how transistors, capacitors, resistors, and interconnects behave at the physical level
• Hands‑on experience with analog or custom layout design, whether from internships, school projects, or professional work
• Familiarity with layout verification tools and concepts like DRC and LVS
• Some exposure to scripting or automation, Python or PCL experience is a strong plus
• Willingness to relocate to Ottawa and work onsite full time as you ramp with the team

• You can take a schematic, ask…