Validation​/Verification Engineer

What You’ll Be Doing

• Validate and characterize DDR, LPDDR, and HBM memory interface IP on silicon, running experiments that prove functionality, performance, and reliability before customer shipment
• Develop and execute test programs on Teradyne J750 ATE, collecting high-volume data across parametric, functional, and stress conditions
• Automate lab equipment using Python to control oscilloscopes, spectrum analyzers, logic analyzers, and power supplies for repeatable, scalable testing
• Debug silicon issues by analyzing measurement data, correlating results across bench and ATE environments, and working with design and firmware teams to isolate root cause
• Assess IP reliability through Latch‑up, HBM, CDM, HTOL, and ELFR testing, documenting results in characterization reports that guide product release decisions
• Design PCB test boards and ATE load boards, working from schematics and layouts to ensure design performs to specification and achieves accurate measurements
• Address customer issues by providing detailed debug, guidance, and driving issues toward resolution

• Your validation work directly determines whether Synopsys memory IP is ready to ship, affecting product timelines and customer confidence across the semiconductor industry
• The test automation you build scales across multiple IP products and releases, reducing validation cycle time and increasing coverage
• Your characterization reports become the technical foundation for customer engagements, sales collateral, and internal design reviews
• Debug rigor you bring to silicon issues prevents costly respins and field failures, protecting both schedule and reputation
• Test methodologies you develop and standardize become the playbook for future validation engineers joining the Nepean lab
• Customer issues you resolve keep high‑stakes programs moving, often under tight timelines where your responsiveness is the difference between a delay and a win
• The data you collect and analyze feeds back into design improvements, tightening the loop between silicon and specification

• Bachelor’s or master’s degree in electrical engineering or computer engineering
• 3–5 years of hands‑on SOC or silicon validation experience, with a strong track record of bringing chips from first silicon to production release
• 3+ years scripting in Python, C++, MATLAB, TCL, Perl, or Visual Basic to automate test sequences, data collection, and analysis workflows
• 2+ years of experience and good understanding of PCB board design or ATE load board design, command over schematics and layout design tools (OrCAD, Altium, Mentor Graphics, KiCAD)
• 2+ years of experience and good knowledge of hardware troubleshooting and PCB debug
• Expertise with lab instruments including oscilloscopes, spectrum analyzers, logic analyzers, and network analyzers, making precision measurements that hold up under scrutiny
• Hands‑on lab/debug experience validating digital and analog blocks
• Experience with high‑volume data analysis and statistical methods to assess performance trends, yield, and reliability across large datasets
• Good to have: experience with DDR, LPDDR, or HBM protocol validation; prior knowledge of ATE platforms such as Teradyne, LTX, Advantest, or Credence; familiarity with JEDEC specifications, jitter analysis, timing characterization, ESD testing, or automotive qualification standards is a strong plus

• You can walk into a lab with a failing test case and walk out two hours later with a root cause and a plan, not just a theory
• When data does not make sense, you do not move on; you dig deeper until it does, even if that means questioning the test setup or the spec itself
• You are comfortable presenting technical results to design teams, customers, and leadership,…