Senior I​/O Chiplet Verification Engineer; SystemVerilog​/UVM

BTADesign

Services in Ottawa, Canada, is seeking a Senior I/O Chiplet Verification Engineer to lead verification of high-speed chiplet interfaces and die-to-die interconnects.

You will design verification plans, develop System Verilog/UVM environments, and collaborate with architecture, RTL, firmware, and IP partners to achieve sign-off with thorough coverage across protocols and reset/latency requirements.

We are looking to fill the Senior I/O Chiplet Verification Engineer (System Verilog/UVM) position at btadesignservices in Ottawa, ON, Canada.

The following position is for a Senior I/O Chiplet Verification Engineer (System Verilog/UVM) with btadesignservices.

Our team is growing, and we are hiring a Senior I/O Chiplet Verification Engineer (System Verilog/UVM) in Ottawa, ON, Canada.

This position is for the Senior I/O Chiplet Verification Engineer (System Verilog/UVM) role at btadesignservices.

We are seeking a motivated Senior I/O Chiplet Verification Engineer (System Verilog/UVM) to join btadesignservices in Ottawa, ON, Canada.