Senior ASIC Verification Engineer – SystemVerilog​/UVM

TSMC Design Technology Canada Inc. (TDTC) in Kanata, Ottawa, is seeking a Digital Verification Engineer to validate digital circuit implementations and develop test benches.

You will work closely with design teams to enable robust functional verification and prepare manufacturing/tester patterns, debugging issues as needed. The role requires 5–10 years of experience in digital verification and expertise in System Verilog, UVM, and EDA tools.

The following position is for a Senior ASIC Verification Engineer – System Verilog/UVM with Kibbi Technologies Inc.

For the Senior ASIC Verification Engineer – System Verilog/UVM position at Kibbi Technologies Inc., we are reviewing applications now.

Step into the Senior ASIC Verification Engineer – System Verilog/UVM role at Kibbi Technologies Inc. in Ottawa, ON, Canada and grow with us.

Please review the full job details above before applying.

If your experience matches this role, we encourage you to apply.