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MSc​/PhD-FeFET--memory computing low-power edge artificial intelligence

Job in Ottawa, Ontario, K0A 0E5, Canada
Listing for: Université de Sherbrooke
Full Time, Seasonal/Temporary position
Listed on 2026-11-04
Job specializations:
  • Engineering
    Electronics Engineer, Electrical Engineering, Research Scientist, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 55000 - 85000 CAD Yearly CAD 55000.00 85000.00 YEAR
Job Description & How to Apply Below
Position: (MSc/PhD)-FeFET-based in-memory computing for low-power edge artificial intelligence

Interdisciplinary Institute for Technological Innovation (3IT)

Organisation/Company Université de Sherbrooke Department Interdisciplinary Institute for Technological Innovation (3IT) Research Field Engineering » Electrical engineering Engineering » Computer engineering Researcher Profile First Stage Researcher (R1) Positions PhD Positions Final date to receive applications 15 Dec 2026 - 00:08 (America/Toronto) Country Canada Type of Contract Temporary Job Status Full-time Hours Per Week 35 Offer Starting Date 5 Jan 2026 Is the job funded through the EU Research Framework Programme?

Other EU programme Is the Job related to staff position within a Research Infrastructure? No

Offer Description

Context

Edge AI requires low-power architectures that process data locally. Conventional systems are limited by repeated transfers between memory and computing units.

Research project The project aims to design, model, simulate, and characterize a FeFET-array in-memory computing architecture to accelerate convolutional neural network (CNN) inference for edge-AI applications. The devices and circuits will be fabricated by a foundry through an MPW program, then experimentally validated and compared with a digital reference.

Proposed activities

  • Define the CNN hardware architecture, weight representation, and layer mapping onto FeFET arrays.
  • Develop SPICE or Verilog-A FeFET models including analog programming and main non-idealities.
  • Design memory cells, MAC arrays, and peripheral circuits for programming, readout, and accumulation.
  • Simulate accuracy, energy, latency, throughput, and silicon area while considering variability, noise, retention, and endurance.
  • Prepare MPW test blocks, develop the measurement setup, and characterize fabricated circuits.
  • Run a CNN using measured data and compare performance with simulations and a digital reference. Expected outcomes
  • FeFET in-memory computing architecture designed, simulated, and validated for CNN execution.
  • Device and circuit models calibrated using experimental measurements.
  • MPW-fabricated integrated circuit, characterization setup, and CNN inference demonstration.
  • Quantitative assessment of accuracy, energy per inference, latency, and robustness.

Supervision and research environment The project will be supervised by Professor Dominique Drouin at the Université de Sherbrooke, in collaboration with Irréversible, mainly at 3IT.

Requirements

Research Field Engineering » Electrical engineering Education Level PhD or equivalent

Skills/Qualifications

Candidate profile

  • Background in electrical or computer engineering, microelectronics, or applied physics.
  • Interest in analog or mixed-signal design, in-memory computing, emerging memories, and AI accelerators.
  • Assets:
    Cadence, SPICE, Verilog-A, VLSI, Python, PyTorch or Tensor Flow, electrical characterization.
  • Scientific rigor, autonomy, teamwork, and communication in French or English.
Specific Requirements

Interest in analog or mixed-signal design, in-memory computing, emerging memories, and AI accelerators

Number of offers available 1 Company/Institute Université de Sherbrooke , Sherbrooke, Canada (QC) Country Canada State/Province Quebec City Sherbrooke, Québec, Canada Postal Code J1K 2R1 Street 3000, Université Blvd (Innovation Park, P2) Sherbrooke (Québec) J1K 0A5 Geofield

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