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Senior I​/O Chiplet Verification Engineer

Job in Ottawa, Ontario, Canada
Listing for: BTA Design Services Inc.
Full Time position
Listed on 2026-10-05
Job specializations:
  • Quality Assurance - QA/QC
    Test Engineer
Salary/Wage Range or Industry Benchmark: 120000 - 170000 CAD Yearly CAD 120000.00 170000.00 YEAR
Job Description & How to Apply Below

About BTADesign Services

Headquartered in Ottawa, BTA Design Services supports the electronic design community across Canada and internationally, specializing in ASIC and FPGA design, verification, and embedded software development. We strengthen our clients' engineering teams and accelerate the delivery of complete, production-ready designs. We are adaptable, efficient, and built around exceptional technical talent. Our continued growth reflects the trust our clients place in us, and we are currently searching for aSenior I/O Chiplet Verification Engineer.

About

the Engagement

The I/O chiplet connects die-to-die interfaces with multi-protocol high-speed I/O, combining UCIe, PCIe,Ethernet, static switching, and an embedded management subsystem. You will collaborate with architecture,RTL, verification, firmware, physical design, and IP partners. Client identity and detailed program specifications are shared under confidentiality during interviews.

About the Position

You will establish and execute verification plans for assigned blocks, subsystems, and chip-level functions. Working closely with designers and architects, you will turn requirements into measurable verification goalsand produce the evidence needed for sign-off, covering both high-speed datapaths and firmware-controlledmanagement functions.

Key Responsibilities
  • Build verification plans that map requirements to test scenarios, platforms, coverage goals, and sign-offcriteria.
  • Develop reusable System Verilog/UVM environments, sequences, agents, scoreboards, referencemodels, and assertions.
  • Integrate vendor VIP and models; verify configured IP and end-to-end connectivity across protocol andPHY interfaces.
  • Verify legal static-switch mappings, protocol modes, data integrity, latency, throughput, and reset or recovery behavior.
  • Verify CSR access, boot and configuration sequences, sideband management, interrupts, and error handling with firmware teams.
  • Apply simulation, formal and connectivity checks, low-power verification, and hardware/software co-simulation where appropriate.
  • Automate regressions, triage failures, and close functional, assertion, and code coverage with documented exclusions.
  • Review CDC/RDC findings with designers, support gate-level sanity checks and bring-up, and reportverification readiness.
Must-Have Qualifications
  • Extensive hands-on ASIC verification experience, 10 years or more, with ownership through tape-outsign-of.
  • Strong System Verilog and UVM skills, including constrained-random stimulus and reusable testbencharchitecture.
  • Proven ability to write verification plans, define coverage, debug complex failures, and driveclosure.
  • Experienceverifyinghigh-speed interfaces,complex

    SoCs,networkingASICs,ordie-to-dieinterconnect.
  • Hands-onVIPintegration,referencemodeling,score boarding,andassertion-based verification.
  • Understanding of multi-clock and reset behavior, protocol corner cases, and the limits of simulation andstatic checks.
  • Strong scripting and regression automation skills, with disciplined test and configuration management.
  • Abilitytoworkindependently,reviewothers'work,andexplainremainingrisksandsign-offevidenceclearly.
Nice-to-Have
  • UCIe,PCIeGen6/Gen7,EthernetPCS/FEC,or224GSerDesandmixed-signalIPverification.
  • Formalmodelchecking,connectivityverification,orpower-awaresimulationwithUPF.
  • Embeddedprocessorverification,secure boot,AXI/APB,registermodels,orfirmware-driven testing.
  • FPGA prototyping or emulation, silicon bring-up, and reviewed AI-assisted verification workflows.
Work Arrangement

Ottawa, Canada, is preferred. Hybrid arrangements may be considered based on the candidate and project needs. Clear written communication, independent execution, and collaboration with distributed engineering teams are essential.

Compensation

Compensation will reflect individual experience, technical capability, and the responsibilities of the role. The package will be discussed during the recruitment process.

Why Work With Us

Join an experienced team working on the connectivity challenges behind advanced AI and computing systems. You will have direct technical ownership, close access to architects and implementation specialists,and the opportunity to shape reusable engineering methods for future chiplet programs. We value sound engineering judgment, collaboration, and a sustainable balance between demanding work and life outside it.

Onlycandidatesselectedforaninterviewwillbecontacted.

Disclaimer

BTA Design Services is an equal opportunity employer. We welcome applications from candidates of all…

Position Requirements
10+ Years work experience
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