Senior DSP Firmware Engineer

We are seeking a Senior DSP Firmware Engineer to design, implement, and debug firmware supporting advanced DSP algorithms on next‑generation silicon platforms. You will work closely with system architects, DSP designers, and verification teams to deliver high‑performance firmware across pre‑silicon and post‑silicon environments.

This role is ideal for a hands‑on engineer with strong DSP fundamentals who can accelerate development, own defined subsystems, and contribute to mentoring junior engineers.

Irving, Ottawa Ontario, Argentina

• Design, implement, and maintain firmware supporting advanced DSP algorithms on embedded processors, working closely with system designers
• Design finite state machines governing DSP acquisition and tracking control loops
• Optimize firmware for real‑time operation, latency, throughput, and resource usage to meet firmware specifications
• Hardware Abstraction Layer generation and integration with simulation, emulation platforms
• Collaborate with verification teams to align firmware validation strategy with regression infrastructure
• Debug complex firmware, DSP, and system‑level issues
• Analyze issues using firmware logs, traces, and instrumentation
• Support regression testing teams by identifying root causes and improving test coverage
• Enforce firmware coding standards, test coverage and best practices
• Mentor and guide junior firmware engineers
• Contribute to defining development workflows and long‑term maintainability

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
• 3–5 years of relevant experience in embedded/firmware development
• Strong background in Digital Signal Processing (DSP) fundamentals and algorithm implementation
• Experience optimizing FFT algorithms and FFT‑based resampling (preferably on SiFive processors)
• Programming: C/C++
• Firmware development for DSP‑centric embedded systems
• Debug and analysis tools: tracing, profiling, logging, and hardware/software debuggability
• Ability to work cross‑functionally with systems, DSP, verification, and hardware teams
• Strong communication skills and ability to mentor junior engineers

• Experience working in coherent optical systems, silicon photonics
• Knowledge of RISC V architecture (SiFive or similar)
• Familiarity with FPGA and emulation platforms for pre‑silicon validation, lab bring‑up tools, including JTAG debuggers, logic analyzers, and oscilloscopes, UVM based verification environments and System Verilog test methodologies

$150,000 - $250,000 Base Annually. The final offer will be determined based on job‑related skills, experience, qualifications, and location.

We are an equal‑opportunity employer. Celero Communications, Inc. does not discriminate on the basis of any protected group status under any applicable law.