Principal DSP Firmware Engineer

Principal DSP Firmware Engineer

We are seeking a Principal DSP Firmware Engineer to lead the architecture, development, and validation of firmware supporting advanced DSP algorithms on next‑generation silicon platforms. You will play a critical role in defining DSP firmware strategy, owning pre‑silicon development, and leading silicon bring‑up, while mentoring engineers across the team.

This role is ideal for a senior technologist who can own end‑to‑end DSP firmware subsystems and drive technical decisions from architecture through deployment.

• Lead the architecture, design, and implementation of DSP firmware subsystems
• Define firmware control interfaces, configuration parameters, and runtime debug controls and diagnostics
• Drive collaboration with system architects and DSP designers on algorithm partitioning, FSM design, and firmware controls
  • Design finite state machines governing DSP acquisition and tracking control loops
  • Optimize firmware for real‑time operation, latency, throughput, and resource usage to meet firmware specifications
• Hardware abstraction layer generation and integration with simulation, emulation platforms
• Collaborate with verification teams to align firmware validation strategy with regression infrastructure
• Drive regression strategy, automation, and test reusability, including customer release automation using Jenkins pipelines
• Debug complex firmware, DSP, and system‑level issues
• Own bring‑up of DSP acquisition flows
• Analyze issues using firmware logs, traces, and instrumentation
• Support regression testing teams by identifying root causes and improving test coverage
• Enforce firmware coding standards, test coverage and best practices
• Mentor and guide junior firmware engineers
• Contribute to defining development workflows, and long‑term maintainability

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 6–10 years of experience in embedded/firmware development.
• Strong background in DSP theory and algorithm implementation.
• Optimizing FFT algorithms and FFT‑based resampling (preferably on SiFive processors).
• Deep experience architecting DSP‑centric firmware systems and expert‑level programming skills in C/C++.
• Familiar with emulation testing frameworks and firmware‑level mocking strategies.
• Experience with pre‑silicon development, silicon bring‑up, and system‑level debugging.
• Familiar with UVM based verification environments and System Verilog test methodologies.
• Familiar with FPGA and emulation platforms for pre‑silicon validation.
• Experience with silicon bring‑up, board bring‑up, and complex firmware debugging.
• Ability to work cross‑functionally with systems, DSP, verification, and hardware teams.
• Strong technical leadership and mentoring skills.

• Knowledge of
  • CMIS (Common Management Interface Specification) standards for optical modules
  • RISC V architecture (SiFive or similar)
• Familiarity with
  • Operating environments:
    Embedded Linux or RTOS (FreeRTOS, Zephyr, VxWorks)
  • Boot architecture: U‑Boot, custom multi‑stage boot flows
  • Low‑level SoC and hardware interfaces: PCIe, Ethernet, I2C, SPI, UART

$150,000 - $250,000 Base Annually

The final offer will be determined based on job‑related skills, experience, qualifications, and location.

As set forth in Celero Communications, Inc.’s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.