Design verification Engineer

An excellent opportunity has arisen to join a global leader in advanced semiconductor technologies.

This role offers the chance to work on cutting-edge 5nm designs, supporting the latest PCIe interfaces, protocols, and NAND flash solutions.
While part of a large international organisation, the UK site operates with the feel of a fast-moving startup but with the stability and backing of a major company. The team builds on over a decade of SSD design expertise, applying a proven methodology that combines RTL design with high-speed microcode engines—delivering flexibility to meet new requirements while minimising the risk of re-spins.
The ASIC team is involved in every stage of the development flow—from requirements capture and architecture through to development, verification, tape-out, and post-silicon support. This provides excellent opportunities both for engineers looking to broaden their skills across the full lifecycle and for those who want to specialise in areas such as UVM-based verification.
As a Verification Engineer, you will join an industry-leading SoC development team tackling complex design challenges including high-speed interfaces, high-performance accelerators, and multi-CPU architectures. Team responsibilities span SoC architecture, RTL design, verification, synthesis, FPGA prototyping, and validation.
Why Oxfordshire?
Oxfordshire offers a fantastic quality of life, combining a world-renowned university city with beautiful countryside. With excellent schools, cultural attractions, and easy access to London and Heathrow, it’s an ideal location for both professionals and families.
Essential qualifications and skills
Bachelor’s or Master’s degree in Electronic Engineering (or related field)
Experience in digital ASIC design and verification, including:
Defining functional requirements for verification environments & metrics
System Verilog UVM test benches
Formal proof verification
Understanding of C test cases and C code
Scripting languages (e.g. Python, Perl, TCL)
Desirable skills

Experience with formal verification tools (Jasper Gold, VC Formal)
Familiarity with C/C++ development
Prior SSD experience with storage interfaces such as SAS or PCIe (NVMe preferred)
What’s on offer
Competitive base salary
Hybrid working model
Generous company pension scheme
Private health insurance
Visa sponsorship and relocation support for experienced engineers
For more information or a confidential discussion, please contact Rachel Mason at IC Resources.