Lead ASIC Architect: Probabilistic Compute & Tape
Listed on 2026-10-11
-
IT/Tech
Hardware Engineer -
Design & Architecture
Unknown in Oxford is seeking an experienced ASIC Architect to own the end-to-end architecture of a probabilistic computing processor, guiding from algorithm and ISA definition through tape-out and silicon bring-up.
You will define system architecture and dataflow models, perform HW/SW co-design, and build simulations to inform decisions, with strong emphasis on timing, power and area trade-offs and verification strategy development.
We invite applications for the Lead ASIC Architect:
Probabilistic Compute & Tape-out position located in Oxford, England, United Kingdom.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Lead ASIC Architect:
Probabilistic Compute & Tape-out role in the description above.
We appreciate your interest in this position.
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