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Senior FPGA Design Engineer; RTL​/SystemVerilog Equity

Job in Palo Alto, Santa Clara County, California, 94306, USA
Listing for: PSI Quantum
Full Time position
Listed on 2026-01-01
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 219000 - 243000 USD Yearly USD 219000.00 243000.00 YEAR
Job Description & How to Apply Below
Position: Senior FPGA Design Engineer (RTL/SystemVerilog) Equity
A leading quantum computing company in California is seeking a digital design engineer to join their Electronic Sub-Systems team. The ideal candidate will have over 12 years of FPGA design experience and expertise in Verilog/System Verilog. Responsibilities include logic design, debugging, and validation for FPGAs. The position promises a competitive salary, with a base pay range of $219,000 — $243,000, and potential for higher compensation within the Bay Area.

Join us to contribute to groundbreaking quantum computing technology.
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Position Requirements
10+ Years work experience
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