SI​/PI Engineer

Rivianis on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract.

As a company, we constantly challenge what’s possible, never simply accepting what has always been done. We reframe old problems, seek new solutions and operate comfortably in areas that are unknown. Our backgrounds are diverse, but our team shares a love of the outdoors and a desire to protect it for future generations.

• Working with package design and pcb design engineers on layout optimization based on SI and PI analysis using industry-standard tools.
• Cross-functional collaborate with SOC architect, physical design, and system design to achieve optimum die, package and system level SI/PI performance
• Hands-on to validate SI/PI performance in lab and correlate with simulations
• Stay current with industry trends, emerging technologies, and best practices in SI and PI design methodologies.

• M.S. Degree in EE or related field with relevant industry-level work experience.
• Strong EE fundamentals and problem-solving skills.
• Strong academic background in EM theory and transmission line.
• Familiarity with all aspects of signal Integrity basic knowledge for high-speed Ser Des, parallel interfaces, as well as power Integrity.
• Hands-on experience in SI/PI analysis for high-speed interconnects using EM and circuit simulation tools such as Ansys HFSS/SIWave/Q2D, Keysight ADS, Spice/Spectre, Cadence Sigrity, and scripting languages (Matlab, Python or Perl).
• Proven track record of incorporating AI into the methodology/workflow with demonstrable increase in productivity and rigor.
• Measurement expertise with frequency and time domain tools (VNA, spectrum analyzer, TDR, oscilloscope).

• Ph.D. in EE or related field with a minimum of 1~2 years of work experience.
• Experience in high speed analog circuit design, including I/O equalization, clocking, fundamental circuits such as Band Gap, Level Shifters, Comparators, DLL, etc.
• Knowledge in 2.5D/3D package design, including interposer, silicon bridge, and 3D die stacking technologies.
• Knowledge of memory and chiplet standards, including timing budget, design & sign-off methodologies.
• Understanding of on-chip DVD/EMIR, system voltage budgets, and voltage regulator modeling and design.
• Excellent communication and presentation skills.

The salary range for this role is $186,000-$296,000 for Palo Alto, CA-based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee’s position within the salary range will be based on several factors, including but not limited to specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs.

The successful candidate may be eligible for an annual performance bonus and equity awards.

We offer a comprehensive package of benefits for full-time and part-time employees, their spouse or domestic partner, and children up to age 26, including but not limited to paid vacation, paid sick leave, and a competitive portfolio of insurance benefits, including life, medical, dental, vision, short-term disability insurance, and long-term disability insurance to eligible employees. You may also have the opportunity to participate in Rivian’s 401(k) Plan and Employee Stock Purchase Program if you meet certain eligibility requirements.

Full-time employee coverage is effective on their first day of employment. Part-time employee coverage is effective the first of the month following 90 days of employment. More information about benefits is…