Senior SOC Physical Verification Engineer; Silicon
Listed on 2026-11-04
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Engineering
Test Engineer, Electronics Engineer, Hardware Engineer, Quality Engineering
SpaceX is seeking a Sr. SOC Physical Verification Engineer (Silicon Engineering) to lead full-chip DRC/LVS/ESD/PERC signoff, and to develop verification flows for multi‑node SOCs used in Starlink satellites and ground systems.
The ideal candidate has extensive experience with Calibre/IC Validator/Pegasus, advanced nodes (4nm+), and strong scripting skills. You will collaborate across ASIC/design teams and with foundries to ensure robust tapeouts and top‑level integration.
For the Senior SOC Physical Verification Engineer (Silicon) position at Starlink, we are reviewing applications now.
Join us at Starlink as our next Senior SOC Physical Verification Engineer (Silicon) in Palo Alto, CA, United States.
We are currently recruiting a Senior SOC Physical Verification Engineer (Silicon) for our team in Palo Alto, CA, United States.
This is a genuine opportunity to take on the Senior SOC Physical Verification Engineer (Silicon) role at Starlink.
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