Power Integrity & EM Signoff Engineer -Gen SoCs
Listed on 2026-11-04
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Engineering
Electrical Engineering, Electronics Engineer, Systems Engineer, Hardware Engineer
Rivian is seeking a highly skilled Physical Design Engineer specializing in Power Integrity (PI) and Signoff Analysis. You will ensure electrical reliability of next-generation SoCs, bridging physical implementation and electrical verification.
Responsibilities include static/dynamic IR drop, EM analysis, and PI signoff for advanced nodes. You will develop automation scripts (Tcl/Python), stay current with EDA tools, and collaborate with PD, RTL, and packaging teams to optimize PG density and
Are you ready to take on the Power Integrity & EM Signoff Engineer for Next-Gen SoCs role at Watershed?
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Power Integrity & EM Signoff Engineer for Next-Gen SoCs role in the description above.
We appreciate your interest in this position.
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