Engineering Intern: Neural Network Hardware Design
Listed on 2026-11-04
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Engineering
Hardware Engineer
Rivian in Palo Alto is seeking an Engineering Intern to work on our Neural Network Engine (NNE) Hardware design. This role is part of our Spring Co-op program and requires you to be onsite for the full duration (Jan–Aug 2027) while enrolled in an accredited program.
You will synthesize RTL for NNE blocks, run simulations, analyze performance, and collaborate with cross‑functional teams to advance our silicon and autonomy goals. Visa sponsorship is not available.
We are looking to fill the Engineering Intern:
Neural Network Hardware Design position at Rivian in Palo Alto, CA, United States.
The Engineering Intern:
Neural Network Hardware Design position in the Engineering field is open for applications.
We have an opening for a Engineering Intern:
Neural Network Hardware Design in Palo Alto, CA, United States within Engineering.
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