Physical Design Engineer: AI-Driven 7nm Chip Implementation
Listed on 2026-11-05
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Engineering
Electronics Engineer, Quality Engineering
Voltai is building world models and agents to learn, evaluate, plan, and interact with the physical world. You will own block-level and full-chip physical implementation, guiding floor planning, placement, clock tree synthesis, routing, and verification on silicon programs with leading semiconductor partners.
You will drive timing closure, power integrity, and congestion control in collaboration with synthesis and STA teams, while evaluating AI-generated floor plans and decisions.
The Physical Design Engineer: AI-Driven 7nm Chip Implementation role at Voltai is now open for applications in Palo Alto, CA, United States.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
The position is based in Palo Alto, CA, United States.
This opportunity is part of our work in Engineering.
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