Gen ASIC Verification Engineer; Silicon
Listed on 2026-11-05
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Engineering
Test Engineer, Hardware Engineer, Electronics Engineer, Validation Engineer
SpaceX in Palo Alto is seeking a Design Verification Engineer (Silicon Engineering) to verify digital ASICs at block and system levels. The role involves writing test plans, creating test harnesses, and building System Verilog test benches for complex designs.
You will automate test cases with Python and MATLAB, contribute to pre‑silicon verification, chip bring‑up, and post‑silicon validation, collaborating across cross‑functional teams to deliver reliable hardware.
Our organisation is growing, and we are hiring a Next-Gen ASIC Verification Engineer (Silicon) in Palo Alto, CA, United States.
This role, Next-Gen ASIC Verification Engineer (Silicon) at SpaceX, could be your next career step.
Are you ready to take on the Next-Gen ASIC Verification Engineer (Silicon) role at SpaceX?
We would love to welcome a new Next-Gen ASIC Verification Engineer (Silicon) to our organisation in Palo Alto, CA, United States.
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