Senior NVM & Memory Circuit Designer
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Engineering
Job Description & How to Apply Below
Mythic in Palo Alto, CA, seeks a highly skilled engineer to design and verify NVM-based circuits for advanced product architecture. You will work on IP macros and full-chip interfaces, ensuring optimum performance and area while collaborating with validation and backend teams to accelerate silicon release.
The role requires hands-on circuit design, full-chip simulation, and verification with experience in NVM, Python, Verilog-A, and System Verilog. Strong communication and teamwork are essential.
The Senior NVM & Memory Circuit Designer position in the Engineering field is open for applications.
Join Mythic and contribute to our ongoing work.
Take a moment to read everything above and see whether this role is right for you.
This posting is for the Senior NVM & Memory Circuit Designer role at Mythic, based in Palo Alto, CA, United States.
Position Requirements
10+ Years work experience(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
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