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Director of Semiconductor Packaging

Job in Cambridgeshire and Peterborough, Peterborough, Cambridgeshire, PE1, England, UK
Listing for: Intellectual Capital Resources Ltd
Full Time position
Listed on 2026-10-10
Job specializations:
  • Engineering
    Packaging Engineer
Salary/Wage Range or Industry Benchmark: 140000 - 200000 GBP Yearly GBP 140000.00 200000.00 YEAR
Job Description & How to Apply Below
Location: Cambridgeshire and Peterborough

A growing semiconductor client is currently seeking a Director of Semiconductor Packaging to lead the development of advanced, high-performance packaging solutions for GaN power semiconductors. The role combines technical leadership, people leadership and hands‑on engineering. The successful candidate will set the packaging strategy, build team capability, influence company-wide decisions and work closely with internal teams and external packaging/manufacturing partners.

Key Responsibilities
  • Lead the design and development of high-performance, high-density semiconductor packages for GaN power products
  • Develop technologies including wirebond, flip-chip, embedded packaging and wafer back‑end processes
  • Balance electrical, thermal, mechanical, cost, quality and form‑factor requirements
  • Lead packaging development with overseas assembly houses and technology suppliers
  • Support package verification, qualification, reliability and thermal testing
  • Drive design‑for‑manufacture, design processes and engineering tools to achieve right‑first‑time designs
  • Conduct first‑article inspection and failure analysis
  • Provide packaging expertise to Applications Engineering and customers
  • Contribute significantly to the product and technology roadmap
  • Build external networks and maintain awareness of state‑of‑the‑art semiconductor packaging
Essential Experience & Skills
  • Degree or higher in Engineering, Physics, Materials Science or a related discipline
  • Strong experience designing and manufacturing high‑volume semiconductor power packages, including working with overseas assembly houses
  • Deep knowledge of packaging technologies including:
    • Die attach / Ag‑sintering
    • Flip‑chip
    • Wire bonding
    • Copper clip
    • PCB embedding
    • Chip metallisation
  • Strong 3D CAD experience and knowledge of supplier design rules/DFM
  • Strong 3D multiphysics/FEA simulation experience using tools such as COMSOL, ANSYS or equivalent
  • Experience with thermal characterisation of semiconductor packages
  • Experience with package qualification/reliability testing, including TCoB, MSL, TC, HAST and HTS, against relevant standards
  • Strong cross‑functional leadership and supplier‑management skills
  • Ability to manage priorities independently and deliver results
  • Confident presenting technical results to internal and external stakeholders
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