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Advanced Silicon Design Application Engineer - Foundry Services; MAG

Job in Phoenix, Maricopa County, Arizona, 85003, USA
Listing for: Intel
Full Time position
Listed on 2025-12-07
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Job Description & How to Apply Below
Position: Advanced Silicon Design Application Engineer - Foundry Services (MAG)
Job Details:

Job Description :

As an integral part of Intel's new Integrated Device Manufacturer 2.0 (IDM
2.0) strategy, we are establishing Foundry Services (FS), a fully vertical, stand-alone foundry business, reporting directly to the CEO. Foundry Services will be a world-class foundry business and major provider of US and European based capacity to serve customers globally. Foundry Services will be differentiated from other foundries with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, and a world-class IP portfolio that customers can choose from, including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP's, along with Arm and RISC-V ecosystem IPs.

Foundry Services will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full PandL responsibilities. This model will ensure that our foundry customers' products receive our utmost focus in terms of service, technology enablement, and capacity commitments.

FS is already engaged with customers today starting with our existing foundry offerings. We are expanding at a torrid pace to include our most advanced technologies, which are ideal for high-performance applications.

Intel Foundry Services is seeking an experienced EDA Tools Software engineer for advanced silicon design technologies  this role you work with silicon design and development engineers on advanced silicon design, system co-design, and packaging technologies tools, flows, and methodologies. You will work closely with design teams and serve as the technical expert on design tools as well as consult on design and implementation issues.

A successful candidate will work with technology specification owners and design validation teams in a coordinated fashion to ensure high-quality solutions and working directly with EDA vendors is expected on a frequent basis in order enable production level solutions.

Responsibilities are the following but not limited to:

Designs, develops, tests, and debugs software tools, design flows, and methodologies related to silicon design processes, flows, and methodologies by interacting with design and development teams including EDA vendors to deliver high-quality production level solutions. Responsibilities also include capturing user requirements, writing functional specifications, processes, flows, and methodologies aimed at meeting user and design requirements and goals.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. The minimum requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and / or schoolwork/classes/research. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • US Citizenship required.
  • Ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph.
  • Bachelor’s degree in electrical / computer engineering, electronics engineering, computer science, or in a STEM related field of study.
  • 3+ years of design experience in Package, or IC digital design or 3+ years of EDA Tool experience.
  • Must have implementation or verification EDA tools from either Cadence, Synopsys or Siemens i.e.
  • 3+ years of design experience in Package, or IC digital design or 3+ years of EDA Tool experience.
  • Implementation tools such as:
    Cadence Virtuoso/Innovus, Allegro (Advanced Package Designer, APD/SiP), Siemens Mentor Xpedition (PCB Layout/XPD), or Synopsys Fusion Compiler.
  • Experience with scripting in TCL, Python, SKILL, VBScript, or Perl to automate design flows.

Preferred Qualifications:

  • Active US Government TS/SCI Security Clearance with Polygraph.
  • Verification tools such as:
    Siemens Calibre, Synopsys ICV, or Cadence Pegasus.
  • 4+ years of experience in design for verification and design for performance: (Signal Integrity, Power Integrity, manufacturing, and/or…
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