Digital Mixed-Signal System Architect

Renesas is seeking an experienced Digital Mixed-Signal System Architect to define, model, and validate the digitally implemented mixed-signal data paths used in next-generation digital power management products for AI, datacenter, and high-performance computing applications.

This role focuses on the digital architecture that connects real-world analog measurements to control-loop decisions: ADC interfaces, ADC controllers, front-end filtering, digital signal processing, telemetry paths, emulation models, timing behavior, fixed-point implementation, and hardware/firmware interface definition.

The successful candidate will work closely with systems, digital design, firmware, verification, validation, applications, and analog design teams to translate product requirements into executable architecture, emulation-ready models, RTL-facing specifications, and silicon-validation evidence. This is not a traditional analog design role; it is a digital systems architecture role for mixed-signal power products.

• Own the digital mixed-signal architecture between sensed power-rail behavior and control-loop action.
• Define reusable front-end DSP, ADC-control, emulation, and observability patterns for advanced digital power products.
• Help product teams converge faster by making mixed-signal behavior executable, measurable, and traceable from model to RTL to silicon.

• Define digital mixed-signal system architecture for digital multiphase power controllers and related power management products.
• Architect front-end digital signal-processing paths used to filter, condition, scale, decimate, observe, and route sensed voltage and current information into control-loop, telemetry, protection, and diagnostic functions.
• Define ADC interface behavior, ADC controller requirements, sampling relationships, data-valid timing, channel sequencing, calibration hooks, latency budgets, saturation behavior, quantization expectations, and error-handling requirements.
• Develop executable models and emulation-oriented representations that allow system behavior to be explored before RTL and silicon are complete.
• Translate system and control-loop requirements into RTL-facing specifications, fixed-point formats, datapath constraints, register behavior, firmware interfaces, and validation requirements.
• Collaborate with analog design experts on ADC and sensing assumptions while focusing ownership on the digital architecture, control data path, emulation behavior, and system-level integration.
• Work with firmware teams to define observability, debug access, telemetry behavior, configuration flows, and bring-up hooks needed for characterization and customer support.
• Partner with verification and validation teams to define reference scenarios, pass/fail criteria, correlation expectations, coverage targets, and structured evidence for architectural decisions.
• Analyze tradeoffs across loop performance, latency, noise sensitivity, resolution, dynamic range, power, area, configurability, implementation complexity, and customer-visible behavior.
• Document architecture clearly for cross-functional execution teams, including assumptions, interface contracts, model behavior, limits, corner cases, and validation expectations.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical discipline.
• 8+ years of experience in digital systems architecture, mixed-signal SoC architecture, digital signal processing, power management, control-oriented digital design, semiconductor verification, or related product development.
• Strong understanding of digital signal-processing concepts, fixed-point arithmetic, sampling…