Senior CPU DFT Engineer

We're seeking a DFT Engineer to join our CPU design team, focusing on Scan insertion and DFT infrastructure for complex, high-performance CPU cores. You'll be involved from architecture through silicon bring-up, contributing to world-class chip quality and manufacturability.

Deliver DFT implementation for CPU cores with an emphasis on scan insertion, test point insertion, and coverage improvement.

Collaborate closely with RTL, verification, and physical design teams to ensure seamless integration of DFT structures.

Develop and maintain DFT automation flows using industry-standard EDA tools.

Analyze and optimize scan coverage, ATPG efficiency, and test time.

Own DFT-related signoff (coverage analysis, timing, pattern validation).

Support silicon bring-up and yield debug, partnering with ATE and product engineering teams.

Contribute to development and continuous improvement of Ahead Computing’s DFT methodologies.

Minimum Qualifications:

B.S./M.S. in Electrical Engineering, Computer Engineering, or equivalent.

6+ years of experience in scan DFT for CPU or complex SoC designs.

Experience in scan insertion and ATPG.

Hands-on experience with tools like Synopsys TestMAX, Siemens Tessent, Cadence Modus, or similar.

Strong scripting skills in TCL, Python, or Perl.

Solid understanding of logic design, synthesis, STA, and physical design impacts of DFT.

Experience with DFT timing constraints and integration into hierarchical flows.

Preferred Qualifications:

Experience with DFT for custom CPU pipelines or high-frequency logic.

Expertise in scan methodologies.

Exposure to DFT-related silicon debug and ATE bring-up.

Contributions to DFT methodologies or flow automation in multi-site teams.

Competitive salary and benefits package.

Opportunities for professional growth in an innovative startup environment.

Collaboration with talented engineers passionate about cutting-edge CPU technologies.

A flexible and inclusive work culture based in Portland, OR or Austin, TX.