Senior CPU RTL Engineer, Silicon Microarchitecture
Listed on 2026-10-17
-
Engineering
Hardware Engineer, Systems Engineer, Test Engineer, Electronics Engineer
Google is seeking a senior hardware engineer to shape the next generation of custom silicon. You will lead CPU subsystem front-end designs, drive microarchitecture decisions, and align RTL with PPA targets, collaborating with Software, Architect, and Performance teams to optimize trade‑offs.
The role emphasizes front-end design leadership for modern processor components or AI accelerators, with opportunities to influence ARM ISA integration and SOC design.
We are currently recruiting a Senior CPU RTL Engineer, Silicon Microarchitecture for our team in Portland, OR, United States.
Learn more about the Senior CPU RTL Engineer, Silicon Microarchitecture role in the description above.
We appreciate your interest in this position.
Join Google and contribute to our ongoing work.
Take a moment to read everything above and see whether this role is right for you.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).