Hybrid Senior Timing Engineer: Silicon STA & Closure
Listed on 2026-10-30
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Engineering
Systems Engineer, Electronics Engineer
Tenstorrent is seeking a Timing Engineer to drive static timing analysis and closure for high-performance AI CPUs and SoCs. You will collaborate with logic, DFT, and physical design teams to debug constraints, optimize timing paths, and ensure performance targets across corners and modes.
The role is hybrid, based in Austin, TX, Fort Collins, CO, or Santa Clara, CA, with offers aligned to experience level. Strong scripting in Python, Perl, and TCL, plus SPICE/OCV experience, are valued.
Step into the Hybrid Senior Timing Engineer:
Silicon STA & Closure role at Tenstorrent in CO, United States and grow with us.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
All applications are reviewed carefully by our team.
The position is based in CO, United States.
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