Senior SI/PI Packaging Lead -Speed ASICs
Listed on 2026-11-01
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Engineering
Packaging Engineer, Systems Engineer
Cisco Silicon One, based in the United States, seeks a Signal and Power Integrity Technical Lead to drive next-generation ASIC packaging. You will define design rules, analyze SI/PI, and collaborate with interposer, substrate, and PCB teams to deliver high-quality packaging for Cisco platforms.
Lead reviews, mentor engineers, and promote postmortems and continuous improvement across multi-disciplinary teams while ensuring performance, reliability, and manufacturability.
The following role is for a Senior SI/PI Packaging Lead for High-Speed ASICs with Cisco.
The advertised compensation is 170..
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior SI/PI Packaging Lead for High-Speed ASICs role in the description above.
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