Verification Engineer

Renesas is seeking an experienced Staff Verification Engineer. As mixed-mixed signal verification engineer you will be responsible for the verification and modeling of mixed-signal Automotive power management devices, including PMICs, switching regulators, and related analog IP. You will work closely with design, systems, validation, and CAD teams to drive successful development, integration, and sign-off of complex mixed-signal power chips.

• Design and architect mixed-signal verification environments, including Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration for PMIC designs
• Develop and implement comprehensive verification plans and strategies for automotive PMIC products, ensuring compliance with automotive safety standards (ISO 26262, AEC-Q200)
• Lead debugging activities for complex analog blocks including switched-mode regulators, Linear Dropout (LDO) regulators, and mixed-signal interfaces
• Set up and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve discrepancies
• Conduct in-depth RTL and Gate-Level simulations, analyzing timing, power, and functional correctness across process, voltage, and temperature (PVT) corners
• Collaborate closely with cross-functional teams:
  Design, Application Engineering, ATE (Automatic Test Equipment), and Silicon Validation to ensure seamless verification handoffs
• Troubleshoot and debug complex design issues involving interactions between analog and digital domains using simulation and measurement techniques
• Drive continuous improvement of verification tools, methodologies, and infrastructure, evaluating emerging verification technologies and AI-based solutions
• Create and maintain comprehensive verification documentation, test plans, and coverage metrics

• Renesas is seeking an experienced Staff Verification Engineer. As mixed-mixed signal verification engineer you will be responsible for the verification and modeling of mixed-signal Automotive power management devices, including PMICs, switching regulators, and related analog IP. You will work closely with design, systems, validation, and CAD teams to drive successful development, integration, and sign-off of complex mixed-signal power chips.

  Key Responsibilities

  Design and architect mixed-signal verification environments, including Real Number Model (RNM) and AMS (Analog Mixed Signal) model integration for PMIC designs

  Develop and implement comprehensive verification plans and strategies for automotive PMIC products, ensuring compliance with automotive safety standards (ISO 26262, AEC-Q200)

  Lead debugging activities for complex analog blocks including switched-mode regulators, Linear Dropout (LDO) regulators, and mixed-signal interfaces

  Set up and optimize Gate-Level Simulation (GLS) flows, correlating with RTL simulation results to identify and resolve discrepancies

  Conduct in-depth RTL and Gate-Level simulations, analyzing timing, power, and functional correctness across process, voltage, and temperature (PVT) corners

  Collaborate closely with cross-functional teams:
  Design, Application Engineering, ATE (Automatic Test Equipment), and Silicon Validation to ensure seamless verification handoffs

  Troubleshoot and debug complex design issues involving interactions between analog and digital domains using simulation and measurement techniques

  Drive continuous improvement of verification tools, methodologies, and infrastructure, evaluating emerging verification technologies and AI-based solutions

  Create and maintain comprehensive verification documentation, test plans, and coverage metrics

Renesas is an embedded semiconductor solution provider driven by its Purpose,
To Make Our Lives Easier
. With a global team of over 21,000…