Memory Subsystem Verification Engineer: UVM & DDR Expert

A leading semiconductor manufacturer is seeking a Verification Engineer to enhance memory subsystem solutions through UVM-based verification environments. Candidates should have experience in Object-Oriented Programming, System Verilog, and digital design verification. The role emphasizes collaboration, problem-solving, and continuous learning while working on complex projects. Located in Raleigh, NC, this full-time position offers an opportunity to impact next-generation computing solutions.
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