Developer, Electrical Engineering, Engineering

Overview

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Solidigm is headquartered in Rancho Cordova, California, with international presence in Asia, Europe, and the Americas. Solidigm aims to lead the world in innovating memory technologies and to be the #1 NAND memory company. We foster a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to deliver excellence in support of Solidigm's vision and mission to be a go-to partner for optimized data storage solutions.

This is a strong opportunity to join a team that designs, builds, and leads Solidigm. We seek a diverse team of dedicated professionals who will contribute to shaping the future of the organization and thrive in a culture that is customer-inspired, trusting, innovative, team-oriented, inclusive, results-driven, collaborative, passionate, and flexible.

• Perform die fit analysis, stack-up, reference plane, and power distribution for multi-die NAND packages.
• Define device package pin-out and I/O bus interface.
• Integrate design requirements from high-speed electrical signaling, high-volume assembly design rules, package and/or PCB design rules, automated test, and emerging IC packaging techniques.
• Perform package and/or PCB routing study analysis for tradeoffs in cost and performance.
• Perform design, analysis, and validation of off-silicon platform interconnects, with a focus on memory interfaces such as DDR2 or high-speed differential I/O interfaces such as SATA or PCIe.
• Define and develop electrical modeling capabilities and analysis techniques for busses and interconnects.
• Work with subcontractors in advancing packaging design rules for product roadmap intercept.

• Bachelor s degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, Material Science, or a related technical field.
• Experience:
  
  Minimum of 5 years of experience in package architecture, IC packaging, or PCB design engineering.
• Expertise with advanced packaging technologies, signal integrity simulation, and electrical analysis of high-speed interconnects (e.g., DDR2, SATA, PCIe, etc.).
• Proven track record of successfully developing package design processes, including stack-up configuration, substrate design, die-fit analysis, and pin-out definition.
• Hands-on experience with signal integrity simulation tools such as HFSS, Sigrity, or CST Microwave Studio.
• Familiarity with packaging technology considerations such as die fit analysis, power distribution planning, routing tradeoff studies, and signal integrity concerns.
• Strong project management and communication skills to manage cross-functional teams across both internal teams and subcontractors.
• Ability to represent Solidigm in industry standard forums, collaborate effectively across multiple divisions, and integrate standards into product development.

Preferred Qualifications:

• Master s degree or PhD in Electrical Engineering, Mechanical Engineering, or Material Science.
• Experience:
  
  Over 8 years of in-depth technical expertise in IC packaging design or NAND product development.
• Knowledge of emerging packaging technologies and techniques (e.g., wafer-level packaging, 2.5D/3D IC integration).
• Familiarity with JEDEC, ONFI, and other industry standards for memory and SSD packaging.
• Advanced proficiency in package modeling tools and techniques.
• Solid understanding of solder joint reliability failure modes and the factors influencing reliability (design, material quality, soldering techniques).
• Solid understanding of package substrate design practices from a signal integrity and power integrity perspective.
• Knowledge of electrical analysis and design of high-speed buses (differential and single ended) as well as familiarity with simulation, modeling, and analysis tools.
• Understanding of thermal analysis and optimization related to multi-die NAND packages.
• Experience driving packaging technology innovation by partnering with subcontractors and suppliers.
• Ability to coordinate across multiple business divisions and contribute to the roadmap of SSD/NAND packaging technologies.

For California, Colorado, New York, Washington, and remote roles:
The compensation range for this role is $156,410 - $250,410. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.

This is an in-office position in Rancho Cordova, California.

Powered by Smart Recruiters - Candidate Privacy Policy