ASIC Verification Engineer North MA)

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Date: Oct 14, 2026

Location: North Reading, MA, US

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.

As an ASIC Verification Engineer based in North Reading, MA, you will play a key role in the development and verification of complex ASIC and SoC designs that support Teradyne’s industry-leading products. You will join the ASIC Reference Model team, so this requires strong technical expertise in digital design verification methodologies, collaboration across engineering disciplines, and the ability to contribute to strategic verification initiatives while driving quality and execution excellence.

This senior role aligns with professionals who work on complex issues requiring conceptual thinking, implement solutions for broadly defined problems, and contribute to the success of larger cross-functional projects.

• Verification planning, testbench architecture, and execution for complex ASIC and SoC designs.
• Develop and maintain SystemC and System Verilog/UVM reference models.
• Develop and maintain System Verilog/UVM-based verification environments, test cases, and reusable verification components.
• Collaborate closely with design, architecture, firmware, software, and validation teams to ensure comprehensive feature coverage.
• Build and execute verification strategies utilizing simulation, coverage-driven verification, assertions, and formal methodologies.
• Support debug and root-cause analysis of functional issues identified during verification and silicon bring-up activities.
• Partner with cross-functional teams to define verification requirements, milestones, and quality metrics.
• Ensure verification deliverables are completed with high quality, on schedule, and aligned with project objectives.

We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you’re ready to join us in this mission, take a closer look at the minimum criteria for the position.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field;
  Master's degree preferred.
• 4+ years of ASIC/SoC verification experience in semiconductor product development.
• Experience with SystemC and C++.
• Object Oriented Programming experience.
• Experience developing verification environments using System Verilog and UVM.
• Deep understanding of functional verification methodologies, constrained-random verification, and coverage closure.
• Experience…