Oriole Networks is seeking an experienced Verification Engineer to design and implement high-performance verification for FPGA/ASIC interfaces at 100
Gbps+ speeds. You will build test benches, develop tests, and drive coverage closure across module and system levels.
You will collaborate closely with RTL and hardware teams, applying advanced verification methodologies and tools (System Verilog, TCL, Python) to deliver robust, production-grade IP and interfaces.
Consider building your career as a Senior Verification Architect for 100
Gbps Networking IP at Oriole.
The position is based in England, United Kingdom.
This opportunity is part of our work in Engineering.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.
Learn more about the Senior Verification Architect for 100
Gbps Networking IP role in the description above.
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