Design Verification Engineer

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Aion Silicon is looking for an experienced Verification Engineers to join our office in Theale/Bristol. In this hands-on technical role, you will contribute to a variety of SoC, subsystem, and IP development projects, taking responsibility for the verification process from planning to coverage closure.

Working closely with ASIC/SoC project leaders, you will architect, specify, and lead the implementation of high-level verification projects, using advanced verification languages. You will also collaborate with multi-site development teams and customers to propose solutions and ensure the delivery of high-quality verification environments and methodologies.

If you are a passionate and innovative engineer who enjoys solving complex verification problems and leading teams, this could be the perfect opportunity for you.

Key Responsibilities:

• Verification Expertise: Provide hands-on expertise in IP and SoC-level functional verification, including the development of test benches and implementation of verification plans.
• Problem Solving: Proactively address and resolve verification challenges, working independently or as part of a collaborative team.
• Mentorship & Team Leadership: Mentor junior team members, fostering a creative and innovative environment and helping to develop new ideas and approaches.
• Industry Knowledge: Stay up-to-date with the latest advancements in verification technologies and methodologies, ensuring Sondrel remains at the forefront of industry best practices.
• Cross-Functional Collaboration: Coordinate with cross-functional teams to define verification strategies and create comprehensive verification plans for SoC designs.
• Optimised Design Solutions: Deliver cutting-edge, optimised solutions for functional verification, ensuring high-quality outcomes.
• Recruitment Support: Contribute to the recruitment process by interviewing candidates and assisting in team expansion activities.

Key Relationships:

Internal:

• Reports to:
  
  Engineering Manager/Principal Engineer
• Collaborates with:
  Engineers, Senior Engineers, Principal Engineers, Project Managers, and HR teams

External:

• Suppliers: EDA Tool Vendors, Foundries, and Assembly Houses

Qualifications:

• A degree, Master's, or PhD in a relevant subject.
• Typically, 5+ years of experience in SoC, subsystem, or IP verification in a team environment.
• A Master's or PhD in a related subject, with 5+ years of practical experience.

Skills & Experience:

• Proven experience in metric-driven verification, including verification planning, functional coverage, code coverage, unit-level verification, and top-level verification.
• Expertise in testbench architecture design and hands-on experience with System Verilog, UVM, ABV, and constrained random verification.
• Experience with PSL, SVA, e, VMM, OVM.
• Familiarity with formal verification techniques such as model checking, CDC, and power-aware verification (e.g., UPF).
• Experience with RTL and gate-level simulation, as well as SoC-level verification, including HW/SW co-verification and multi-mode simulation.
• Familiarity with HW acceleration techniques like emulation.
• Experience with verification infrastructure automation (e.g., Perl, Python, Java, Tcl, IP-XACT, UCDB).
• Strong knowledge of C programming for verification tasks.
• Demonstrated ability to listen to customer feedback, recognise opportunities for technical innovation, and provide constructive feedback.
• Experience in contributing to or presenting technical white papers.
• Advanced knowledge or experience in multiple verification sub-functions.

Attributes…