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Sr. Signal and Power Integrity Engineer, Satellites; Starlink

Job in Redmond, King County, Washington, 98052, USA
Listing for: SPACE EXPLORATION TECHNOLOGIES CORP
Full Time position
Listed on 2025-12-01
Job specializations:
  • Engineering
    Electrical Engineering, Electronics Engineer, Systems Engineer, Hardware Engineer
Salary/Wage Range or Industry Benchmark: 130000 - 180000 USD Yearly USD 130000.00 180000.00 YEAR
Job Description & How to Apply Below
Position: Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

Sr. Signal and Power Integrity Engineer, Satellites (Starlink)

Redmond, WA

Space

X was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today Space

X is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. Space

X is leveraging its experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers, the software that brings it all together. As the constellation grows, we’re looking for best‑in‑class engineers to join the team.

As a Signal and Power Integrity Engineer on Starlink’s Payload Engineering team, you’ll own SI and PI throughout the complete life‑cycle of the portfolio of hardware that enables connectivity. You will sit at the intersection of electrical, mechanical, thermal, software, and antenna/RF engineering. Your work spans silicon architecture, package performance, stackup selection, channel and PDN architecture, PCB layout oversight, and troubleshooting across all product phases.

RESPONSIBILITIES
  • Specify, design, simulate, verify, qualify, and define production screens for SI and PI aspects of advanced satellite hardware
  • Work with wireline and electro‑optical communication systems at up to 112+ Gbps SERDES, DSPs, retimers, and optoelectronics
  • Design and troubleshoot high‑speed memory interfaces (DDR4, LPDDR5, GPDDR6, QSPI NOR, eMMC, etc.)
  • Define power networks for associated ASICs and processors
  • Collaborate with RF, antenna, ASIC, packaging, mechanical, thermal, software, supply‑chain, and production engineers to architect new products
  • Derive top‑level specifications for PCB materials and channel subcomponents; optimize transition structures from die bump to die bump
  • Drive detailed component selection for PDN designs
  • Root‑cause and fix issues in PCB manufacturing, PCBA test, or satellite integration
  • Define best practices, simulation workflows, test methodologies, sign‑off criteria, and lab equipment needs for all SI/PI needs on Starlink payloads
BASIC QUALIFICATIONS
  • Bachelor’s degree in electrical engineering, computer engineering, or physics
  • 5+ years of industry experience designing circuits, electronic products, or hardware
  • 2+ years of experience with 3D EM simulation tools and high‑speed digital channel simulators (CST, HFSS, ADS, etc.)
  • 2+ years of research or industry experience with high‑speed digital design or power integrity
PREFERRED SKILLS AND EXPERIENCE
  • Master’s degree or PhD in electrical engineering, computer engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity
  • 5+ years of electronic product experience designing hardware from concept through production with a strong emphasis on life‑cycle development of new products
  • 5+ years of experience architecting, implementing, and debugging cutting‑edge DSP‑based SERDES products (56 Gbps, 112 Gbps, 224 Gbps) across package and PCB
  • Thorough understanding of wireline transceiver concepts, architectures, and circuits
  • 5+ years of experience specifying, analyzing, debugging, and working with high‑speed, high‑bandwidth memory interfaces
  • 5+ years of experience designing, implementing, and debugging power delivery networks for large processors, FPGAs, SoCs, or ASICs with complex power requirements
  • Strong understanding of computers and programming languages (Python, C/C++)
  • Demonstrated ability to work in a highly cross‑functional role
  • Experience with low‑loss laminates, high‑volume PCB manufacturing, and high‑speed connectors
  • Experience debugging and resolving EMI/EMC de‑sense problems
  • Passion for optimizing package, PCB, ASIC, and mixed‑signal circuits to deliver best‑in‑class products
ADDITIONAL REQUIREMENTS
  • Ability to work extended hours or weekends as needed for mission‑critical deadlines
  • Some travel may occasionally be required
COMPENSATION AND BENEFITS

Pay range:
Signal & Power Integrity Engineer/Senior: $130,000 - $180,000 per year
Your actual level and base salary will be determined on a…

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