Senior Analog CMOS Layout Engineer 3nm FinFET
Job in
Redmond, King County, Washington, 98052, USA
Listed on 2025-12-20
Listing for:
Apex Systems
Full Time
position Listed on 2025-12-20
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Hardware Engineer, Electrical Engineering
Job Description & How to Apply Below
A leading technology firm is seeking a Hardware Design Engineer focused on analog circuit layout in advanced CMOS technology (2–3nm). The ideal candidate has over 4 years of experience in layout design using Cadence Virtuoso and Calibre tools, with a strong understanding of analog techniques. Responsibilities include hands-on design work and collaborating in team projects to drive the development of analog mixed-signal circuits for data center processors.
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Position Requirements
10+ Years
work experience
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