Senior PCB Design Engineer

You will own complex, high-speed board design in the phased-array signal chain - and see your designs through the lab. The team runs design and validation in parallel: while one board revision is being validated at the bench, the next is in design. You'll design boards (schematic capture, component selection, layout ownership), personally bring up newly fabricated hardware, debug to root cause, and feed findings into the next revision.

This is a design-first seat with real lab ownership - not a test role, and not a documentation role.

• Design high-complexity, high-speed digital boards: schematic capture, component selection, and layout ownership on 20+ layer, thousands-of-components designs built around custom silicon.
• Architect power delivery for boards carrying hundreds of high-performance chips - rail generation, sequencing, budgeting, and protection.
• Design and validate multi-gigabit interfaces (Ser Des-class links, JESD
  204, PCIe, DDR) with disciplined signal- and power-integrity practice.
• Bring up newly fabricated boards in the lab: first power-on, section-by-section checkout, root-cause debug with oscilloscopes and high-speed instrumentation.
• Run validation campaigns proving designs meet requirements, and feed every finding into the next board revision.
• Select components with reliability, thermal, vibration, and radiation considerations in partnership with specialist review teams.

• 8+ years of board-level design ownership - complex boards you can point to and say "mine": schematic, component selection, and layout.
• High-speed digital design:
  Ser Des, JESD
  204, PCIe, and/or DDR, with hands-on signal-integrity practice (controlled impedance, length matching, stackup design).
• Power-architecture design for dense, high-power boards.
• Genuine lab fluency: you bring up and debug your own designs at the bench - scopes, analyzers, and methodical root-cause work.
• U.S. citizenship or permanent residency (export-controlled program - required).