Senior ASIC RTL Design Engineer — Space-Grade SoC Innovator
Listed on 2026-10-11
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Engineering
Electronics Engineer, Hardware Engineer, Test Engineer, Systems Engineer
United States Digital Space LLC is seeking a Senior RTL Design Engineer to develop next-generation ASICs for space and ground infrastructure. You will define micro-architecture, implement RTL in Verilog/System Verilog, and collaborate with verification to ensure fully verified designs for silicon bring-up.
The role requires 5+ years in RTL implementation, experience with embedded CPU subsystems, and proficiency in standard bus protocols like AXI/AHB.
Step into the Senior ASIC RTL Design Engineer — Space-Grade SoC Innovator role at Spacex in Redmond, WA, United States and grow with us.
This posting is for the Senior ASIC RTL Design Engineer — Space-Grade SoC Innovator role at Spacex, based in Redmond, WA, United States.
We are looking to fill the Senior ASIC RTL Design Engineer — Space-Grade SoC Innovator position at Spacex in Redmond, WA, United States.
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