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Senior Technical Architect
Job in
Redmond, King County, Washington, 98052, USA
Listed on 2026-10-24
Listing for:
HCL Technologies Limited
Full Time
position Listed on 2026-10-24
Job specializations:
-
Engineering
Test Engineer, Electronics Engineer, Hardware Engineer
Job Description & How to Apply Below
Senior Technical Architect (181371)
Requisition
181371
-Posted
10/20/2026
Senior ATE Development Engineer to support Microsoft's advanced Quantum and Cryogenic Computing silicon initiatives. The engineer will work onsite in Redmond, partnering directly with Product Engineering, Design Verification (DV), DFT, and Test teams to develop and deploy ATE solutions for next-generation silicon devices. This is a hands-on engineering role requiring strong expertise in Advantest V93000 (93K), Smart Test 8, pattern generation/conversion, silicon bring-up, characterization, and data analysis.
The successful candidate will operate independently within Microsoft's lab environment and drive ATE development from initial silicon through characterization and debug.
- ATE & Test Development
- Develop and debug Advantest V93000 (93K) test programs using Smart Test 8.
- Create manufacturing test solutions and support silicon bring-up.
- Develop test content for Scan, MBIST, JTAG, I2C, SPI, and digital interfaces.
- Pattern Generation & DFT
- Convert DV outputs into production-ready test patterns.
- Generate, validate, and debug Scan, MBIST, ATPG, and protocol-level tests.
- Partner with Design, DV, and DFT teams on test strategy and coverage closure.
- Silicon Validation & Debug
- Execute silicon characterization and validation plans.
- Debug silicon, tester, load board, and pattern failures.
- Drive root-cause analysis and resolution.
- Data Analysis & Automation
- Analyze tester data using Python, JMP, and statistical tools.
- Develop automation for characterization, reporting, and yield analysis.
- Generate actionable engineering insights and reports.
- Cross-Functional Collaboration
- Work closely with Microsoft, HCLTech, Design, DV, and DFT teams.
- Participate in technical reviews, debug sessions, and validation planning.
- Independently drive deliverables while coordinating with global stakeholders.
- 8+ years of semiconductor ATE development experience.
- Proven experience with Advantest V93000 (93K).
- Extensive Smart Test 8 expertise.
- Experience supporting silicon characterization and bring-up activities.
- Strong understanding of semiconductor product development lifecycle.
- Technical Skills
- Scan pattern generation and debug.
- MBIST pattern development.
- JTAG, SPI, and I2C protocol testing.
- Pattern conversion and replay methodologies.
- ATPG and DFT concepts.
- Silicon debug and characterization.
- Tester hardware debug and validation.
- Programming Skills
- Python scripting for automation and data analysis.
- Linux/Unix environment proficiency.
- Experience with statistical analysis tools such as JMP.
- Experience with low-power, mixed-signal, AI, HPC, networking, or quantum-related silicon.
- Experience with Advantest Smart Test 7 and Smart Test 8.
- Familiarity with VTRAN or equivalent pattern conversion tools.
- Experience working closely with DV and DFT teams.
- Experience supporting lab-based silicon development and characterization.
Position Requirements
10+ Years
work experience
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