Verification Specialist

Job Title

FPGA Tech Lead

Redmond, WA;
Seattle, WA, Washington

$65.00/hr - $70.00/hr

• He should have some lead experience, even hands on experience in also fine.
• Design Verification expertise in System Verilog /UVM for Unit/Module level Verification
• Should have Lead Design Verification Team (Min 5 members)
• Strong background in developing UVM Test benches from scratch
• Experience in VIP Integration and Bring up
• Porting Existing Verilog/VHDL environment to UVM-based Environment
• Experience in test planning, Coverage Coding and Debugging
• Deep Knowledge of AMBA Protocol is must

Mid-Senior level

Contract

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