Founding Hardware Engineer

What you’ll do:

As founding hardware engineer, you will be a core contributor to our ultra-low latency matching engine, implementing its technology as a hw/sw co-design in System Verilog, Rust, and C++.

PAX is building the world’s first exchange and co‑located trading facility on a chip. We will go-to-market using AWS F2 FPGA instances and follow‑on with an ASIC design that combines network aggregation with exchange functionality.

PAX provides the fastest tick‑to‑trade and market data publication in the world, across all exchanges (e.g. faster than NYSE, Deutsche Börse, etc.).

The PAX λ API provides traders with on‑chip exchange integrated HFT decision logic. Using the λ API, traders can make markets or take arbitrage opportunities. The λ API enables traders to respond to market events the very instant the information is registered in the exchange matching engine.

PAX sells access to its ultra‑low‑latency λ API and offers trading otherwise for free. Existing exchanges typically offer rebates for liquidity providers ("makers") and charge fees to liquidity takers (the "maker/taker" fee structure). At PAX when λ and non‑λ orders pair together, the free‑tier order is given a cash rebate regardless of whether their order was characterized as making or taking.

PAX is the first exchange to offer zero‑fee trading and rebates for both making and taking.

• On‑exchange trading incentives with inherent price competition
• PAX rebates & fees
• PAX λ API

Candidates with experience in high frequency trading (HFT) or at an exchange are encouraged to apply.

• System Verilog
• FPGA or ASIC design experience
• Rust and/or C++
• HFT
• Protobuf
• Curiosity and ability to learn
• Passion for trading and markets