Director, Custom HBM Design and Architecture

Req :

JR113804 Director, Custom HBM Design and Architecture

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a Director of Custom HBM Design and Architecture, you will lead a team responsible for the design, integration, and delivery of next‑generation HBM SoC logic die for AI/ML applications. You will drive technical strategy and execution across multiple product generations, working closely with architecture, design, verification, physical design, firmware, and product engineering teams. (LLM)

• Analyze hardware and software interaction at the system level to identify bottlenecks in existing AI/ML workloads and HBM-based hardware.
• Drive future HBM architecture, design, and technology to address bottlenecks, including implementing proof of concept designs.
• Drive translation of architectural and micro‑architectural specifications into robust, high‑quality RTL implementations across multiple teams.
• Own RTL design deliverables across the lifecycle, from RTL development through integration, validation, and silicon bring‑up.
• Drive trade‑offs across performance, power, area, schedule, and risk, ensuring optimal product outcomes.
• Proactively identify execution risks and implement mitigation strategies across teams and design phases.
• Build, lead, and scale a high‑performing RTL design and integration team, including recruiting, mentoring, and retention of top engineering talent.
• Set technical direction and expectations, enabling engineers to execute complex designs with high quality and efficiency.
• Foster a culture of innovation, accountability, and continuous improvement aligned with organizational values.
• Develop future technical leaders and strengthen organizational capabilities in HBM SoC design.

• Proven experience leading large‑scale SoC design teams delivering complex SoCs to advanced process nodes (e.g., TSMC).
• Deep expertise in RTL design, SoC integration, and full RTL‑to‑GDS flows, including synthesis, timing, and signoff considerations.
• Strong experience integrating complex IP subsystems (controllers, NOC, microcontrollers, PHY‑adjacent logic, RAS, MBIST, interfaces).
• Solid understanding of SoC architecture, clocking, reset, power management, and system‑level design trade‑offs.
• Experience with pre‑silicon validation, hardware emulation, and post‑silicon debug methodologies.
• Familiarity with EDA tools and scripting languages (e.g., System Verilog, Python, TCL).
• Knowledge of DRAM/HBM systems and JEDEC standards preferred.

• 15+ years of relevant SoC design experience with increasing scope and technical leadership.
• Demonstrated success driving multiple tape‑outs and cross‑functional SoC programs.
• Strong leadership, communication, and organizational influence skills.
• Experience building and managing global engineering teams.

Job Profile(s):

Machine Learning Engineer Manager 2 - Machine Learning Engineer Manager 3

Relocation Level: TBD

• Hiring managers may view your performance appraisals, original resume, transcripts or other performance‑related documentation in your personal file. This information will be held in confidence.
• If you are selected to interview for a position, you must notify your direct supervisor before participating in the interview process.

The US base salary range that Micron Technology estimates it could pay for this full‑time position is:

$ - $ a year

Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and…